项目描述 ：
This accelerator uses a Nexys A7 100T FPGA to overlay an one image over another using an image mask and performing masking operations, with the results being displayed over VGA. The purpose of this project was to utilize the parallel nature of FPGAs to create a hardware accelerator for image masking applications.

高级语言： VHDL

项目主页：

项目地址: git://github.com/matthew-william-lock/Image-Masking-Accelerator.git

创建时间： 2020-05-10T14:57:35Z
项目社区：https://github.com/matthew-william-lock/Image-Masking-Accelerator
开源协议：
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