项目作者: rhthomas

项目描述 :
Experimenting with FPGA open-source toolchains.
高级语言: Verilog
项目地址: git://github.com/rhthomas/fpga.git
创建时间: 2018-05-15T20:46:07Z
项目社区:https://github.com/rhthomas/fpga

开源协议:GNU General Public License v3.0

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fpga

Experimenting with FPGA open-source toolchains.

Tools

The FPGA that is developed on is the iCEstick from Lattice Semiconductor.

This expands on other FPGA open-source tools such as icestorm and iverilog among others.

A quick script is used to generate the directory structure for new modules, simply run perl create.pl <module> <project> to create a folder with all the necessary files.
If the project is the same as the module name (i.e. you’re creating a small sub-module) the project field can be omitted.

  1. > perl create.pl module project
  2. Creating module module files.
  3. +- module/Makefile
  4. +- module/module.sv
  5. +- module/module_tb.sv
  6. +- module/icestick.pcf

Builds


adder : Simple adder module.



count : Binary counter.



dance : LED pattern display.

Requirements

IceStorm

  1. git clone https://github.com/cliffordwolf/icestorm.git icestorm
  2. cd icestorm
  3. make
  4. sudo make install

Arachne-PNR

  1. git clone https://github.com/cseed/arachne-pnr.git arachne-pnr
  2. cd arachne-pnr
  3. make
  4. sudo make install

Yosys

  1. git clone https://github.com/cliffordwolf/yosys.git yosys
  2. cd yosys
  3. make
  4. sudo make install

Netlistsvg (RTL netlist diagrams)

More information given here.

  1. (install nodejs)
  2. git clone https://github.com/nturley/netlistsvg
  3. cd netlistsvg
  4. npm install -g

iVerilog (simulations)

macOS

  1. brew install icarus-verilog

Scansion (VCD viewer for macOS)

Download here.